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| author | Shlomo Hecht <shlomo@twine-s.com> | 2018-08-06 08:15:53 +0300 |
|---|---|---|
| committer | Shlomo Hecht <shlomo@twine-s.com> | 2018-08-06 08:15:53 +0300 |
| commit | db2ff630640c1f2ae5df69a80a883dc8f5de17e1 (patch) | |
| tree | a29ceb8184827181d0b6addab70d742f3b0b282b /Software/Embedded_SW/Embedded/Common/Sys_PinOut_Config | |
| parent | 266c4dd5f8ae09d7e601f7ef8a62642aba00dcb0 (diff) | |
| download | Tango-db2ff630640c1f2ae5df69a80a883dc8f5de17e1.tar.gz Tango-db2ff630640c1f2ae5df69a80a883dc8f5de17e1.zip | |
evaluation board adjustments, uart clock timer
Diffstat (limited to 'Software/Embedded_SW/Embedded/Common/Sys_PinOut_Config')
| -rw-r--r-- | Software/Embedded_SW/Embedded/Common/Sys_PinOut_Config/Pin.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Software/Embedded_SW/Embedded/Common/Sys_PinOut_Config/Pin.c b/Software/Embedded_SW/Embedded/Common/Sys_PinOut_Config/Pin.c index 5798b01ee..74411a066 100644 --- a/Software/Embedded_SW/Embedded/Common/Sys_PinOut_Config/Pin.c +++ b/Software/Embedded_SW/Embedded/Common/Sys_PinOut_Config/Pin.c @@ -73,6 +73,7 @@ PortFunctionInit(void) MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC1); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_USB0); + MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART7); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART5); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM0); @@ -583,6 +584,20 @@ PortFunctionInit(void) MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_0); // + // Configure the GPIO Pin Mux for PA0 + // for U0RX + // + MAP_GPIOPinConfigure(GPIO_PA0_U0RX); + MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0); + + // + // Configure the GPIO Pin Mux for PA1 + // for U0TX + // + MAP_GPIOPinConfigure(GPIO_PA1_U0TX); + MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_1); + + // // Enable pin PC7 for UART5 U5TX // MAP_GPIOPinConfigure(GPIO_PC7_U5TX); |