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authorShlomo Hecht <shlomo@twine-s.com>2018-04-08 18:39:20 +0300
committerShlomo Hecht <shlomo@twine-s.com>2018-04-08 18:39:20 +0300
commitf22f64fec07df88dc302c7d541197a01bec50879 (patch)
tree6582b163793d13ff57d5497cd6c464b98dfa12f9 /Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
parent692d71abcd583ade2977d4b6012b9c2a6de7d4d8 (diff)
downloadTango-f22f64fec07df88dc302c7d541197a01bec50879.tar.gz
Tango-f22f64fec07df88dc302c7d541197a01bec50879.zip
Communication Tx, Communication Rx tasks.
UART comunication (no buffers yet!)
Diffstat (limited to 'Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c')
-rw-r--r--Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
index 968e55390..133bb9ed1 100644
--- a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
+++ b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
@@ -99,3 +99,19 @@ int FPGA_ReadVersion(unsigned char FPGA_NUM, unsigned char *Version, unsigned c
return PASSED;
}
+
+void Init_FPGA()
+{
+ //PreScale + PWM
+ //60MHz / PreScaler / (PWM High + PWM Low)
+ //for SPI Motor driver the maximum is 5MHz the default is the FPGA is 4 (60/2/(2+3)) = 4
+
+ //EPI Host-Bus 8 Configuration 3 (EPIHB8CFG3)
+ // Value Description
+ // 0x0 Active WRn is 2 EPI clocks
+ // 0x1 Active WRn is 4 EPI clocks <--
+ // 0x2 Active WRn is 6 EPI clocks
+ // 0x3 Active WRn is 8 EPI clocks
+
+}
+