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| author | Avi Levkovich <avi@twine-s.com> | 2020-07-15 18:43:04 +0300 |
|---|---|---|
| committer | Avi Levkovich <avi@twine-s.com> | 2020-07-15 18:43:04 +0300 |
| commit | a5db8b9e482d1ecfb15389270da4fa7f8bd64b94 (patch) | |
| tree | c8fb3599a969b245d687256b64fc234d8cb63755 /Software/Embedded_SW/Embedded | |
| parent | 2369511b0f29a2a19b6f6629c06f9d123b05377d (diff) | |
| download | Tango-a5db8b9e482d1ecfb15389270da4fa7f8bd64b94.tar.gz Tango-a5db8b9e482d1ecfb15389270da4fa7f8bd64b94.zip | |
Temporary workaround to check if head card and whs card are availabe
Diffstat (limited to 'Software/Embedded_SW/Embedded')
5 files changed, 16 insertions, 11 deletions
diff --git a/Software/Embedded_SW/Embedded/.cproject b/Software/Embedded_SW/Embedded/.cproject index fc105d8b9..4bebf3c83 100644 --- a/Software/Embedded_SW/Embedded/.cproject +++ b/Software/Embedded_SW/Embedded/.cproject @@ -170,7 +170,7 @@ </toolChain> </folderInfo> <sourceEntries> - <entry excluding="Drivers/I2C_Communication/test_fifo_dma.c|Drivers/Uart_Comm/WHS_Controller_Comm/Modbus|Drivers/Uart_Comm/WHS_Controller_Comm/Modbus/tcp|Drivers/I2C_Communication/RFID_NFC/NFC_I2C|Drivers/I2C_Communication/RFID_NFC/PN7150|Drivers/I2C_Communication/Head_Card/ADC/Head_ADC_old.c|src|EmbParam.cfg" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/> + <entry excluding="Drivers/I2C_Communication/I2C_FIFO.c|Drivers/I2C_Communication/test_fifo_dma.c|Drivers/Uart_Comm/WHS_Controller_Comm/Modbus|Drivers/Uart_Comm/WHS_Controller_Comm/Modbus/tcp|Drivers/I2C_Communication/RFID_NFC/NFC_I2C|Drivers/I2C_Communication/RFID_NFC/PN7150|Drivers/I2C_Communication/Head_Card/ADC/Head_ADC_old.c|src|EmbParam.cfg" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/> </sourceEntries> </configuration> </storageModule> diff --git a/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.c b/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.c index 04388865b..c83fe6e50 100644 --- a/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.c +++ b/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.c @@ -23,6 +23,8 @@ #define I2C_DELAY 3000 uint8_t Main_Mux_Flag = UNKNOWN; +uint32_t I2C_BUSY_DELAY = 100; + void InitI2C2() { // diff --git a/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.h b/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.h index e8fa3efc3..56c386aa8 100644 --- a/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.h +++ b/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.h @@ -10,8 +10,8 @@ extern uint32_t Arb_Loss_Count; - -#define I2C_BUSY_DELAY 100//15000 +extern uint32_t I2C_BUSY_DELAY; +//#define I2C_BUSY_DELAY 100//15000 uint32_t I2C_control(uint32_t I2C_ID, uint32_t Slave_Add, bool RW,uint32_t Byte2Write ); void Init_All_I2C(); diff --git a/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C_Comm.c b/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C_Comm.c index 9bcdec476..182e5ccf7 100644 --- a/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C_Comm.c +++ b/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C_Comm.c @@ -55,16 +55,16 @@ uint32_t I2C_WriteBuff(uint32_t I2C_BASE, unsigned char addr, unsigned char* dat { I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_SINGLE_SEND); SysCtlDelay(I2C_BUSY_DELAY);//The CPU waits for the Command processing to begin before it goes to check if the command is processed - while(I2CMasterBusy(I2C_BASE)); status |= I2CMasterErr(I2C_BASE); + while(I2CMasterBusy(I2C_BASE)); } else { // Start sending consecutive data I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_BURST_SEND_START); SysCtlDelay(I2C_BUSY_DELAY);//The CPU waits for the Command processing to begin before it goes to check if the command is processed - while(I2CMasterBusy(I2C_BASE)); status |= I2CMasterErr(I2C_BASE); + while(I2CMasterBusy(I2C_BASE)); len--; data++; @@ -74,8 +74,8 @@ uint32_t I2C_WriteBuff(uint32_t I2C_BASE, unsigned char addr, unsigned char* dat I2CMasterDataPut(I2C_BASE, *data); I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_BURST_SEND_CONT); SysCtlDelay(I2C_BUSY_DELAY);//The CPU waits for the Command processing to begin before it goes to check if the command is processed - while(I2CMasterBusy(I2C_BASE)); status |= I2CMasterErr(I2C_BASE); + while(I2CMasterBusy(I2C_BASE)); len--; data++; @@ -85,8 +85,8 @@ uint32_t I2C_WriteBuff(uint32_t I2C_BASE, unsigned char addr, unsigned char* dat I2CMasterDataPut(I2C_BASE, *data); I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH); SysCtlDelay(I2C_BUSY_DELAY);//The CPU waits for the Command processing to begin before it goes to check if the command is processed - while(I2CMasterBusy(I2C_BASE)); status |= I2CMasterErr(I2C_BASE); + while(I2CMasterBusy(I2C_BASE)); } return status; @@ -119,9 +119,9 @@ uint32_t I2C_ReadBuff(uint32_t I2C_BASE, unsigned char addr, unsigned char* data //see: https://e2e.ti.com/support/microcontrollers/other/f/908/t/368493?Why-is-a-delay-needed-before-writing-the-first-byte-from-I2C-Master- //therefore we need delay before waiting until bus is not busy - it doesn't work as expected without it or with while(!(I2CMasterBusy(I2C0_BASE) SysCtlDelay(I2C_BUSY_DELAY);//The CPU waits for the Command processing to begin before it goes to check if the command is processed + status |= I2CMasterErr(I2C_BASE); while(I2CMasterBusy(I2C_BASE)); *data = I2CMasterDataGet(I2C_BASE); - status |= I2CMasterErr(I2C_BASE); } else { @@ -129,9 +129,9 @@ uint32_t I2C_ReadBuff(uint32_t I2C_BASE, unsigned char addr, unsigned char* data // Start receiving consecutive data I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START); SysCtlDelay(I2C_BUSY_DELAY);//The CPU waits for the Command processing to begin before it goes to check if the command is processed + status |= I2CMasterErr(I2C_BASE); while(I2CMasterBusy(I2C_BASE)); *data = I2CMasterDataGet(I2C_BASE); - status |= I2CMasterErr(I2C_BASE); len--; data++; @@ -141,9 +141,9 @@ uint32_t I2C_ReadBuff(uint32_t I2C_BASE, unsigned char addr, unsigned char* data while(len > 1){ I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT); SysCtlDelay(I2C_BUSY_DELAY);//The CPU waits for the Command processing to begin before it goes to check if the command is processed + status |= I2CMasterErr(I2C_BASE); while(I2CMasterBusy(I2C_BASE)); *data = I2CMasterDataGet(I2C_BASE); - status |= I2CMasterErr(I2C_BASE); len--; data++; @@ -152,9 +152,9 @@ uint32_t I2C_ReadBuff(uint32_t I2C_BASE, unsigned char addr, unsigned char* data // Receive last piece of data I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH); SysCtlDelay(I2C_BUSY_DELAY);//The CPU waits for the Command processing to begin before it goes to check if the command is processed + status |= I2CMasterErr(I2C_BASE); while(I2CMasterBusy(I2C_BASE)); *data = I2CMasterDataGet(I2C_BASE); - status |= I2CMasterErr(I2C_BASE); } return status; } diff --git a/Software/Embedded_SW/Embedded/Main.c b/Software/Embedded_SW/Embedded/Main.c index 5c6c13686..88ba521a4 100644 --- a/Software/Embedded_SW/Embedded/Main.c +++ b/Software/Embedded_SW/Embedded/Main.c @@ -39,6 +39,7 @@ #include <DataDef.h> #include "Sys_PinOut_Config/MCU_MAIN_pinout.h" +#include <Drivers/I2C_Communication/I2C.h> /* #include "Drivers/SPI_SDCARD/SDSPI.h" @@ -265,8 +266,10 @@ int main(void) Init_All_I2C(); Block_Main_MUX_TCA9548A_0xE4();//unused, same i2c as head and whs cards + I2C_BUSY_DELAY = 3000; //temporary workaround!!! Check_Head_Type_Via_EEPROM();//without trigger Check_WHS_Type_Via_EEPROM();//without trigger + I2C_BUSY_DELAY = 100; //temporary workaround!!! if ((Head_Type >= HEAD_TYPE_UNKNOWN_WITH_CARD)&&(WHS_Type == WHS_TYPE_NEW)) { PP_Machine = true; |
