Read Limit Switches

3 files changed, 96 insertions, 1 deletions

diff --git a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
index 2b3631128..3b9333525 100644
--- a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
+++ b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
@@ -161,3 +161,19 @@ void Init_FPGA()
 
 }
 
+
+//---------------------------------- Limit_Switches ------------------------------------------------
+
+Limit_Switch1_REG   Limit_Switch1;
+Limit_Switch2_REG   Limit_Switch2;
+Limit_Switch3_REG   Limit_Switch3;
+
+void Read_limit_Switches()
+{
+    Limit_Switch1.ushort = F1_GPI_LS1_D;
+    Limit_Switch2.ushort = F1_GPI_LS2_D;
+    Limit_Switch3.ushort = F1_GPI_LS3_D;
+}
+
+
+
diff --git a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_Comm.h b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_Comm.h
index 91d215d5b..ca972247c 100644
--- a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_Comm.h
+++ b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_Comm.h
@@ -1117,6 +1117,85 @@ typedef union
     }bits;
     unsigned short ushort;
 }VALVE_BUSY_REG;
+
+
+//---------------------------------- Limit_Switches ------------------------------------------------
+
+//F1_GPI_LS1_D
+typedef union
+{
+    struct
+    {
+        bool F1_LS_DRYER_SPARE4     : 1; //0
+        bool F1_LS_DRYER_SPARE3     : 1; //1
+        bool F1_LS_DRYER_SPARE2     : 1; //2
+        bool F1_LS_DRYER_SPARE1     : 1; //3
+        bool F1_LS_DRYER_LID_OPEN   : 1; //4
+        bool F1_LS_DRYER_LID_CLOSED : 1; //5
+        bool F1_LS_DH_SPARE2        : 1; //6
+        bool F1_LS_DH_LID_OPEN      : 1; //7
+        bool F1_LS_DH_LID_CLOSED    : 1; //8
+        bool F1_LS_DH_LID_CLEANING  : 1; //9
+        bool F1_LS_DH_CLEAN_UP      : 1; //10
+        bool F1_LS_DH_CLEAN_RIGHT   : 1; //11
+        bool F1_LS_DH_CLEAN_LEFT    : 1; //12
+        bool F1_LS_DH_CLEAN_DOWN    : 1; //13
+        bool RESERVE_BIT14          : 1; //14
+        bool RESERVE_BIT15          : 1; //15
+    }bits;
+    unsigned short ushort;
+}Limit_Switch1_REG;
+
+//F1_GPI_LS2_D
+typedef union
+{
+    struct
+    {
+        bool F1_LS_PIVOT_SPARE2  : 1; //0
+        bool F1_LS_PIVOT_SPARE1  : 1; //1
+        bool F1_LS_LSPARE2       : 1; //2
+        bool F1_LS_LSPARE1       : 1; //3
+        bool F1_LS_LPIVOT_UP     : 1; //4
+        bool F1_LS_LPIVOT_DOWN   : 1; //5
+        bool F1_LS_LOADARM_RIGHT : 1; //6
+        bool F1_LS_LOADARM_LEFT  : 1; //7
+        bool F1_LS_LLOADMOTOR_UP : 1; //8
+        bool F1_LS_LLOADMOTOR_DOW: 1; //9
+        bool F1_LS_LDANCER2_UP   : 1; //10
+        bool F1_LS_LDANCER2_DOWN : 1; //11
+        bool F1_LS_LDANCER1_UP   : 1; //12
+        bool F1_LS_LDANCER1_DOWN : 1; //13
+        bool RESERVE_BIT14       : 1; //14
+        bool RESERVE_BIT15       : 1; //15
+    }bits;
+    unsigned short ushort;
+}Limit_Switch2_REG;
+
+//F1_GPI_LS3_D
+typedef union
+{
+    struct
+    {
+        bool F1_LS_SCREW_RIGHT     : 1; //0
+        bool F1_LS_SCREW_LEFT      : 1; //1
+        bool F1_LS_RSPARE2         : 1; //2
+        bool F1_LS_RSPARE1         : 1; //3
+        bool F1_LS_RDANCER_LONG    : 1; //4 (F1_LS_RLOADRAM_UP)
+        bool F1_LS_RLOADRAM_DOWN   : 1; //5
+        bool F1_LS_RLOADMOTOR_UP   : 1; //6
+        bool F1_LS_RLOADMOTOR_DOWN : 1; //7
+        bool F1_LS_RDANCER_UP      : 1; //8
+        bool F1_LS_RDANCER_DOWN    : 1; //9
+        bool F1_SW_SPARE           : 1; //10
+        bool F1_SW_SPOOL_EXISTS    : 1; //11
+        bool RESERVE_BIT12         : 1; //12
+        bool RESERVE_BIT13         : 1; //13
+        bool RESERVE_BIT14         : 1; //14
+        bool RESERVE_BIT15         : 1; //15
+    }bits;
+    unsigned short ushort;
+}Limit_Switch3_REG;
+
 //------------------------------ MOTOR DRIVER L_6470 ------------------------------
 
 typedef union
diff --git a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SPI_Comm.c b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SPI_Comm.c
index 5b7bd182d..71b8f1c2e 100644
--- a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SPI_Comm.c
+++ b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SPI_Comm.c
@@ -174,7 +174,7 @@ void FPGA_Get_Res(TimerMotors_t _motorId) //The answer for every FPGA Get Cmd
 void FPGA_GetBusy()
 {
 #ifndef EVALUATION_BOARD
-    uint8_t i;
+   // uint8_t i;
 
     F1MOTNBUSY1 F1_MOT_NBUSY1;
     F1MOTNBUSY2 F1_MOT_NBUSY2;