Add global unions for SSR 1-11

4 files changed, 39 insertions, 21 deletions

diff --git a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
index f68485881..aff2e7cd1 100644
--- a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
+++ b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA.c
@@ -18,21 +18,23 @@
 
 unsigned short GPO_01_Reg;
 
+extern F3_GPO_01_REG F3_GPO_01_Reg;
+
 int FPGA_Test()
 {
-    GP_Out_01 Gpo_01;
 
-    Gpo_01.bits.F3_LUBRICANT_VALVE = 1;
-    Gpo_01.bits.F3_GPO_LED3 = 1;
-    Gpo_01.bits.F3_GPO_LED2 = 0;
-    Gpo_01.bits.F3_GPO_LED1 = 1;
-    Gpo_01.bits.F3_GPO_EXTWINDER_SSR11_CTRL = 1;
-    Gpo_01.bits.F3_GPO_BUZZER = 0;
-    Gpo_01.bits.F3_SPARE2_ROTENC_CLK = 1;
-    Gpo_01.bits.F3_SPARE1_ROTENC_CLK = 1;
-    Gpo_01.bits.RESERVE = 0xF5;
 
-    GPO_01_Reg = Gpo_01.ushort;
+    F3_GPO_01_Reg.bits.F3_LUBRICANT_VALVE = 1;
+    F3_GPO_01_Reg.bits.F3_GPO_LED3 = 1;
+    F3_GPO_01_Reg.bits.F3_GPO_LED2 = 0;
+    F3_GPO_01_Reg.bits.F3_GPO_LED1 = 1;
+    F3_GPO_01_Reg.bits.F3_GPO_EXTWINDER_SSR11_CTRL = 1;
+    F3_GPO_01_Reg.bits.F3_GPO_BUZZER = 0;
+    F3_GPO_01_Reg.bits.F3_SPARE2_ROTENC_CLK = 1;
+    F3_GPO_01_Reg.bits.F3_SPARE1_ROTENC_CLK = 1;
+    F3_GPO_01_Reg.bits.RESERVE = 0xF5;
+
+    GPO_01_Reg = F3_GPO_01_Reg.ushort;
 
     return 0;
 }
diff --git a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_Comm.h b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_Comm.h
index 9ddbbe485..15bdf97cd 100644
--- a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_Comm.h
+++ b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_Comm.h
@@ -282,6 +282,10 @@
 #define F1_Tacho_reg6                          (*((volatile short  *)(FPGA1_BASE | 0x3CC)))    //This Register stores the Tacho counter
 #define F1_Tacho_reg7                          (*((volatile short  *)(FPGA1_BASE | 0x3CE)))    //This Register stores the Tacho counter
 
+//read SSR10
+#define F1_CTRL_bus1_reg                       (*((volatile short  *)(FPGA1_BASE | 0x3A0))) //This Register stores the ssr with n_heater_wd_expire value - read of the value of F1_GPO_DILUTORPUMP_SSR10_CTRL
+
+
 //GPO
 #define F1_gpo_01                              (*((volatile short  *)(FPGA1_BASE | 0x3D2)))    //Gpo Register Miscellaneous output register, 16bits
 
@@ -372,6 +376,9 @@
 //Watchdog
 #define F2_Watchdog_reg                        (*((volatile short  *)(FPGA2_BASE | 0x140)))//Watchdog enable bit, watchdog value
 
+//read SSR1 - SSR9
+#define F2_CTRL_bus1_reg                       (*((volatile short  *)(FPGA2_BASE | 0x170))) //This Register stores the ssr with n_heater_wd_expire value - read of the value of SSR1 - SSR9
+
 //SSI
 #define F2_DISPENSER_ROTENC_DATA_p_1_RX_lsb    (*((volatile short  *)(FPGA2_BASE | 0x180))) //The 16 Lsb bits of the shifted in data.
 #define F2_DISPENSER_ROTENC_DATA_p_1_RX_msb    (*((volatile short  *)(FPGA2_BASE | 0x182))) //16 bit MSB if nessesary
@@ -705,8 +712,11 @@
 #define  F3_high_var_SPARE2_1                  (*((volatile short  *)(FPGA3_BASE | 0x3AA))) //Parameter for prescaler divisions - 8bit  high duty cycle value for pmw
 #define  F3_low_var_SPARE2_2                   (*((volatile short  *)(FPGA3_BASE | 0x3AC))) //Parameter for prescaler divisions - 8bit low duty cycle value for pmw
 #define  F3_high_var_SPARE2_2                  (*((volatile short  *)(FPGA3_BASE | 0x3AE))) //Parameter for prescaler divisions - 8bit  high duty cycle value for pmw
-//
 
+//read SSR11
+#define F3_CTRL_bus1_reg                       (*((volatile short  *)(FPGA3_BASE | 0x3B0))) //This Register stores the ssr with n_heater_wd_expire value - read of the value of F3_GPO_EXTWINDER_SSR11_CTRL
+
+//
 #define F3_Prescaler1_reg9                     (*((volatile short  *)(FPGA3_BASE | 0x3C2))) //Variable for prescaler divisions -amount of prescaled clocks clk input of prescaler of signal debouncer of the limit switch. 14bits. The value inserted here is multiply by 8 before being set.
 #define F3_SW_RESET_reg                        (*((volatile short  *)(FPGA3_BASE | 0x3D0))) //This register resets the MCU
 
@@ -1075,7 +1085,7 @@ typedef union
         unsigned char RESERVE; // 8-15
     }bits;
     unsigned short ushort;
-}GP_Out_01;
+}F3_GPO_01_REG;
 
 //F3_VALVE_OUT
 typedef union
@@ -1281,7 +1291,7 @@ typedef union
 #define DYEINGH_SSR11_CTRL BIT4 //HeadHeaterZ6
 
 
-/*
+
 //F2_CTRL
 typedef union
 {
@@ -1299,15 +1309,15 @@ typedef union
         bool F2_GPO_DRYER_SSR2_CTRL   : 1; //9
         bool F2_GPO_DRYER_SSR1_CTRL   : 1; //10
         bool F2_GPO_PDOWN_RL1_CTRL    : 1; //11
-        bool RESERVE_BIT12            : 1; //12
-        bool RESERVE_BIT13            : 1; //13
-        bool RESERVE_BIT14            : 1; //14
-        bool RESERVE_BIT15            : 1; //15
+        bool F2_GPO_RESERVE_BIT12     : 1; //12
+        bool F2_GPO_RESERVE_BIT13     : 1; //13
+        bool F2_GPO_RESERVE_BIT14     : 1; //14
+        bool F2_GPO_RESERVE_BIT15     : 1; //15
     }bits;
     unsigned short ushort;
-}F2_CTRL_SSR_REG;
+}F2_CTRL_REG;
+
 
-*/
 //--------------------------------------------------------------------------------
 
 
diff --git a/Software/Embedded_SW/Embedded/Drivers/Valves/Valve.c b/Software/Embedded_SW/Embedded/Drivers/Valves/Valve.c
index 3b1d53758..4e653f98e 100644
--- a/Software/Embedded_SW/Embedded/Drivers/Valves/Valve.c
+++ b/Software/Embedded_SW/Embedded/Drivers/Valves/Valve.c
@@ -21,7 +21,7 @@
 #include "Modules/Control/Control.h"
 
 VALVE_GPO_REG Valve_GPO_Reg;
-F1_GPO_REG F1_GPO_Reg;
+extern F1_GPO_REG F1_GPO_Reg;
 DISPENSER_VALVE_GPO_REG Dispenser_Valve_GPO_Reg;
 
 Valves_t IDS_Id_to_AirValve[MAX_IDS_UNITS] = {VALVE_2W_MID_AIR_1,VALVE_2W_MID_AIR_2,VALVE_2W_MID_AIR_3,VALVE_2W_MID_AIR_4,VALVE_2W_MID_AIR_5,VALVE_2W_MID_AIR_6,VALVE_2W_MID_AIR_7,VALVE_2W_MID_AIR_8};
diff --git a/Software/Embedded_SW/Embedded/Main.c b/Software/Embedded_SW/Embedded/Main.c
index 699f1ad44..5136c4521 100644
--- a/Software/Embedded_SW/Embedded/Main.c
+++ b/Software/Embedded_SW/Embedded/Main.c
@@ -86,6 +86,12 @@ static volatile uint32_t g_ui32Flags;
 
 bool Machine_Idle_Mode = false;
 
+
+F2_CTRL_REG F2_CTRL_Reg;
+F1_GPO_REG F1_GPO_Reg;
+
+F3_GPO_01_REG F3_GPO_01_Reg;
+
 //MessageContainer createContainer(MessageType type, char* token, protobuf_c_boolean completed, void* response, size_t (*packPtr)(void*, uint8_t*), size_t (*sizePtr)(void*));
 uint32_t MainDummyFunction(uint32_t IfIndex, uint32_t ReadValue)
 {