From a377e13f8f71e88ad5989569e0fb2851662228d9 Mon Sep 17 00:00:00 2001 From: Shlomo Hecht Date: Sun, 5 Aug 2018 11:09:30 +0300 Subject: blower default voltage 4V. fix job abort token --- Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Software/Embedded_SW/Embedded/Modules/Thread') diff --git a/Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c b/Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c index 8d1ea20fa..75d54ef02 100644 --- a/Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c +++ b/Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c @@ -127,8 +127,8 @@ void ThreadUpdateProcessLength (double length, void *Funcptr) ProcessedLengthFuncPtr = (ProcessedLengthFunc)Funcptr; initialpos = 0xFFFF; } -double MotorSentData[102] = {0}; -uint32_t PosDif[102] = {0}; +double MotorSentData[100] = {0}; +uint32_t PosDif[100] = {0}; int MotorDataIndex = 0; @@ -181,7 +181,7 @@ uint32_t ThreadLengthCBFunction(uint32_t IfIndex, uint32_t ReadValue) //PosDif[MotorDataIndex] = positionDiff; MotorSentData[MotorDataIndex] = length; MotorDataIndex+=1; - if (MotorDataIndex >= 97) MotorDataIndex = 0; + if (MotorDataIndex == 99) MotorDataIndex = 0; static int pooler_counter = 0; pooler_counter++; TotalProcessedLength+= (length/100); -- cgit v1.3.1 From 7ecebc1b110323767067348897596151fb8a8262 Mon Sep 17 00:00:00 2001 From: Avi Levkovich Date: Sun, 5 Aug 2018 17:18:27 +0300 Subject: Calculate Speed Sensor Velocity --- Software/Embedded_SW/Embedded/.cproject | 4 +- .../Embedded/Drivers/Danser_SSI/SSI_Comm.c | 257 --------------------- .../Embedded/Drivers/Danser_SSI/SSI_Comm.h | 35 --- .../Embedded/Drivers/Danser_SSI/Speed_Sensor.c | 70 ------ .../Embedded/Drivers/Danser_SSI/Speed_Sensor.h | 93 -------- .../Embedded/Drivers/FPGA/FPGA_SSI_Comm.c | 2 +- .../Embedded/Drivers/FPGA/FPGA_SSI_Comm.h | 2 +- .../Embedded/Drivers/SSI_Comm/Dancer/Dancer.c | 91 ++++++++ .../Embedded/Drivers/SSI_Comm/Dancer/Dancer.h | 20 ++ .../Embedded/Drivers/SSI_Comm/SSI_Comm.c | 203 ++++++++++++++++ .../Embedded/Drivers/SSI_Comm/SSI_Comm.h | 30 +++ .../Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.c | 118 ++++++++++ .../Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.h | 95 ++++++++ Software/Embedded_SW/Embedded/Main.c | 2 +- .../Embedded/Modules/AlarmHandling/AlarmHandling.c | 2 +- .../Embedded/Modules/Control/MillisecTask.c | 2 +- .../Embedded/Modules/Diagnostics/Diagnostics.c | 2 +- .../Embedded_SW/Embedded/Modules/Thread/Thread.h | 3 +- .../Embedded/Modules/Thread/Thread_print.c | 3 +- 19 files changed, 568 insertions(+), 466 deletions(-) delete mode 100644 Software/Embedded_SW/Embedded/Drivers/Danser_SSI/SSI_Comm.c delete mode 100644 Software/Embedded_SW/Embedded/Drivers/Danser_SSI/SSI_Comm.h delete mode 100644 Software/Embedded_SW/Embedded/Drivers/Danser_SSI/Speed_Sensor.c delete mode 100644 Software/Embedded_SW/Embedded/Drivers/Danser_SSI/Speed_Sensor.h create mode 100644 Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Dancer/Dancer.c create mode 100644 Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Dancer/Dancer.h create mode 100644 Software/Embedded_SW/Embedded/Drivers/SSI_Comm/SSI_Comm.c create mode 100644 Software/Embedded_SW/Embedded/Drivers/SSI_Comm/SSI_Comm.h create mode 100644 Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.c create mode 100644 Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.h (limited to 'Software/Embedded_SW/Embedded/Modules/Thread') diff --git a/Software/Embedded_SW/Embedded/.cproject b/Software/Embedded_SW/Embedded/.cproject index 763ec6609..f81cf0c62 100644 --- a/Software/Embedded_SW/Embedded/.cproject +++ b/Software/Embedded_SW/Embedded/.cproject @@ -163,7 +163,7 @@ - + @@ -431,7 +431,7 @@ - + diff --git a/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/SSI_Comm.c b/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/SSI_Comm.c deleted file mode 100644 index cff0ed994..000000000 --- a/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/SSI_Comm.c +++ /dev/null @@ -1,257 +0,0 @@ -// RLS Orbis BR10SCB14B12CH00 -//RLS Orbis -//BR10 -//SC - SSI -//B - Start bit and idle data line 1 (standard) -//14B - 14 bits per revolution -//12 - Magnet type compatibility -//C - - 0 °C to +85 °C -//H - Soldering pads with through holes -//00 - No special requirements - - -/* -down - -Name : RByte - Default:34988 - Hex:0x000088AC - Decimal:34988 - Octal:0104254 - Binary:0000000000000000 10001000101011 00b (position = 8747) -up - Name : RByte - Default:44520 - Hex:0x0000ADE8 - Decimal:44520 - Octal:0126750 - Binary:0000000000000000 10101101111010 00b (position = 11130) - - missing 8 bits of Detailed status (the 16 MSB should not be receive) - */ - -#include -#include -#include -#include -#include - -#include "inc/hw_memmap.h" -#include "driverlib/gpio.h" -#include "driverlib/pin_map.h" -#include "driverlib/ssi.h" -#include "driverlib/sysctl.h" -#include "utils/uartstdio.h" - -#include -#include -#include -#include "driverlib/uart.h" - -#include "SSI_Comm.h" - -#include "drivers/FPGA/FPGA_SSI_Comm.h" -#include "PMR/Hardware/HardwareDancerType.pb-c.h" - - - -extern SSI_DANCER_ENC DANCER_ENC[NUM_OF_ROTENC]; - -typedef struct // 24bit -{ - unsigned short Position:14; - unsigned char Gen_status:2; - unsigned char Det_status:8; -}SSI_ENC; - -/* -typedef enum -{ - FEEDER_DANCER, - POOLER_DANCER, - WINDER_DANCER, - NUM_OF_DANCERS -} Dancers_t; - - {LDANCER1_ROTENC2,"LDANCER1_ROTENC2"}, - {LDANCER2_ROTENC2,"LDANCER2_ROTENC2"}, - {RDANCER_ROTENC2,"RDANCER_ROTENC2"}, -*/ -SSI_ENC SSI_enc; - -void SSI1_Init() -{ - #if defined(TARGET_IS_TM4C129_RA0) || \ - defined(TARGET_IS_TM4C129_RA1) || \ - defined(TARGET_IS_TM4C129_RA2) - uint32_t ui32SysClock; - #endif - - // - // Set the clocking to run directly from the external crystal/oscillator. - // TODO: The SYSCTL_XTAL_ value must be changed to match the value of the - // crystal on your board. - // - #if defined(TARGET_IS_TM4C129_RA0) || \ - defined(TARGET_IS_TM4C129_RA1) || \ - defined(TARGET_IS_TM4C129_RA2) - - ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | - SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | - SYSCTL_CFG_VCO_480), 120000000); - #else - SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | - SYSCTL_XTAL_16MHZ); - #endif - - // The SSI1 peripheral must be enabled for use. - // - SysCtlPeripheralReset(SYSCTL_PERIPH_SSI1); - SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1); - - // - // For this example SSI1 is used with PortG[7:4]. GPIO port G needs to be - // enabled so these pins can be used. - // - SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); - SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); - SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); - - /* Configure pad settings */ // AVI -// GPIOPadConfigSet(GPIO_PORTE_BASE, -// GPIO_PIN_4, -// GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD); - - GPIOPadConfigSet(GPIO_PORTE_BASE, - GPIO_PIN_5, - GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU); - - GPIOPadConfigSet(GPIO_PORTB_BASE, - GPIO_PIN_4 | GPIO_PIN_5, - GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD); - - // - // Configure the pin muxing for SSI1 functions - // This step is not necessary if your part does not support pin muxing. - // - - GPIOPinConfigure(GPIO_PB5_SSI1CLK); - GPIOPinConfigure(GPIO_PB4_SSI1FSS); - GPIOPinConfigure(GPIO_PE4_SSI1XDAT0); - GPIOPinConfigure(GPIO_PE5_SSI1XDAT1); - - // - // Configure the GPIO settings for the SSI pins. This function also gives - // control of these pins to the SSI hardware. Consult the data sheet to - // see which functions are allocated per pin. - // The pins are assigned as follows: - // PE4 - SSI1Tx - // PE5 - SSI1Rx - // PB4 - SSI1Fss - // PB5 - SSI1CLK - //SSI0XDAT0......SSI0TX in Legacy SSI Mode....which is MOSI in your terms - //SSI0XDAT1......SSI0RX in Legacy SSI Mode....which is MISO in your terms - // - GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5); - //GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5); - GPIOPinTypeSSI(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5); - - // - // Configure and enable the SSI1 port for SPI Master mode. - // - -// SSIConfigSetExpClk(SSI1_BASE, ui32SysClock, SSI_FRF_NMW, -// SSI_MODE_MASTER, 500000, 16); // to receive Clock period 2uSec, Clock frequency 500KHz -// //SSI_MODE_MASTER send 24 bits 0x00 (dummy) 0x7f 0xff -> create clock of 24 bits for SSI -// - SSIConfigSetExpClk(SSI1_BASE, ui32SysClock, SSI_FRF_MOTO_MODE_0,//SSI_FRF_NMW, - SSI_MODE_MASTER, 500000, 32);//16); // to receive Clock period 2uSec, Clock frequency 500KHz - //SSI_MODE_MASTER send 24 bits 0x00 (dummy) 0x7f 0xff -> create clock of 24 bits for SSI - - SSIAdvModeSet(SSI1_BASE,SSI_ADV_MODE_READ_WRITE ); // ??? Acording to Silicon Errata - SSI1 can Only be Used in Legacy Mode !!! - // - // Disable the SSI1 module. - // - SSIDisable(SSI1_BASE); - //---------------------------------------------------------------- - -} - -uint32_t Write_Dummy_Byte() -{ - //Transmit a dummy set of words to get the SPI to generate a certain number of clocks - uint8_t WByte = 0x00; // Dummy Byte - uint32_t RByte = 0x00; - - uint32_t timeout = SSI_SPI_TIMEOUT; - - SSIDataPut(SSI1_BASE, WByte); - - while(SSIBusy(SSI1_BASE)) - { - timeout--; - if(timeout == 0) - { - return 0; - } - } - - while(SSIDataGetNonBlocking(SSI1_BASE, &RByte)){}; //FIFO to read 24 bit - - - //return (RByte & 0xffffff);// 24 bytes - return (RByte & 0xffff);//14 bit position + 2 bit general status -} -uint32_t Control_Read_Dancer_Position(HardwareDancerType DancerId, uint32_t Parameter1, uint32_t Parameter2) -{ - return DANCER_ENC[DancerId].Position; - //return SSI_enc.Position; -} - - -uint32_t Read_Dancer_Position (HardwareDancerType DancerId) -{ - #ifdef EVALUATION_BOARD - uint32_t ENC_SSI_Data = 0; - - SSIEnable(SSI1_BASE); - - ENC_SSI_Data = Write_Dummy_Byte(); - - - //SSI_enc.Det_status = ENC_SSI_Data & 0xFF; - //ENC_SSI_Data = ENC_SSI_Data >> 8; - SSI_enc.Det_status = 0; - - SSI_enc.Gen_status = ENC_SSI_Data & 0x3; - ENC_SSI_Data = ENC_SSI_Data >> 2; - SSI_enc.Position = ENC_SSI_Data & 0x3FFF; // up 11130 down 8747 - - SSIDisable(SSI1_BASE); - return SSI_enc.Position; - #else - // must call FPGA_SSI_Transmit first! - HardwareDancerType Dancer_Id = (HardwareDancerType)DancerId;//to remove warning - FPGA_SSI_Receive(Dancer_Id); - FPGA_SSI_Transmit(Dancer_Id); - return DANCER_ENC[Dancer_Id].Position; - #endif -} -uint32_t Read_Speed_Sensor () // //The speed sensor, RMB14SC12BC59N , is 12bit SSI encoder -{ - FPGA_SSI_Speed_Sensor_Transnit(); - FPGA_SSI_Speed_Sensor_Receive(); - return SpeedSensorResponseS.Speed; -} -void Loop_SSI() -{ - while(1) - { - Read_Dancer_Position(HARDWARE_DANCER_TYPE__RightDancer); - SysCtlDelay(1000); // Min 1000 (Pause time > 20uSec) - } - -} - - - diff --git a/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/SSI_Comm.h b/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/SSI_Comm.h deleted file mode 100644 index 220f607f8..000000000 --- a/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/SSI_Comm.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * MillisecTask.h - * - * Created on: 15 Mar 2018 - * Author: Avi - */ - -#ifndef DRIVERS_DANCER_SSI_SSI_COMM_H_ -#define DRIVERS_DANCER_SSI_SSI_COMM_H_ - -#include "PMR/Hardware/HardwareDancerType.pb-c.h" - -/*typedef enum -{ - //DANSER_ROTENC: - ROTENC_LDANCER2, // winder Dancer adjustment #1 LEFT Dancer - ROTENC_LDANCER1, // pooler Dancer adjustment Middle Dancer - ROTENC_RDANCER, // feeder dancer adjustment Right Dancer -// ROTENC_LSPARE, -// ROTENC_RSPARE, - //DISPENSER_ROTENC: - - NUM_OF_ROTENC -}RotEnc_t;*/ - -#define NUM_OF_ROTENC HARDWARE_DANCER_TYPE__RightDancer+1 -void SSI1_Init(); -uint32_t Read_Dancer_Position (HardwareDancerType DancerId); -uint32_t Control_Read_Dancer_Position(HardwareDancerType DancerId, uint32_t Parameter1, uint32_t Parameter2); -uint32_t Read_Speed_Sensor (void); - -void Loop_SSI(); - - -#endif //DRIVERS_DANCER_SSI_SSI_COMM_H_ diff --git a/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/Speed_Sensor.c b/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/Speed_Sensor.c deleted file mode 100644 index 628bab5e1..000000000 --- a/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/Speed_Sensor.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Speed_Sensor.c - * - * Created on: Aug 2, 2018 - * Author: avi - * - * The speed sensor, RMB14SC12BC59N , is 12bit SSI encoder. - * According to the data sheet, It has an internal IC : AM4096. - * - */ -#include -#include -#include -#include -#include - -#include "inc/hw_memmap.h" -#include "driverlib/gpio.h" -#include "driverlib/pin_map.h" -#include "driverlib/ssi.h" -#include "driverlib/sysctl.h" -#include "utils/uartstdio.h" - -#include -#include -#include -#include "driverlib/uart.h" - -#include "SSI_Comm.h" - -#include "drivers/FPGA/FPGA_SSI_Comm.h" - -#include "Speed_Sensor.h" - -SSReg0 SSREG_RW_ADR_49; -SSReg1 SSREG_RW_ADR_50; -SSReg2 SSREG_RW_ADR_51; -SSReg3 SSREG_RW_ADR_52; - - -void Init_Speed_Sensor_Registers() -{ - SSREG_RW_ADR_49.bits.Pdint = 0; //0 = on, 1 = off - SSREG_RW_ADR_49.bits.AGCdis = 1; //0 = AGC on, 1 = AGC off - SSREG_RW_ADR_49.bits.Slowint = 1; //0 = on, 1 = off - It must always be set to 1 - SSREG_RW_ADR_49.bits.Pdtr = 0; //00 = 1:128, 01 = 1:256, 10 = 1:512, 11 = 1:1024 - SSREG_RW_ADR_49.bits.Pdie = 0; //0 = disabled, 1 = enabled - SSREG_RW_ADR_49.bits.Reg35 = 0; //0 = 3 V, 1 = 3.3 V ??? 5v - SSREG_RW_ADR_49.bits.Addr = 0; //0 to 127 Default address is set to 0. - - SSREG_RW_ADR_50.bits.Abridis = 1; - SSREG_RW_ADR_50.bits.Bufsel = 0; - SSREG_RW_ADR_50.bits.Monsel = 0; //must be set to 0 - SSREG_RW_ADR_50.bits.Sign = 0; - SSREG_RW_ADR_50.bits.Zin = 0; - - SSREG_RW_ADR_51.bits.Daa = 0; - SSREG_RW_ADR_51.bits.Hist = 0; - SSREG_RW_ADR_51.bits.Nfil = 0; //must be set to 0 - - SSREG_RW_ADR_52.bits.Dact = 1; - SSREG_RW_ADR_52.bits.Dac = 0; - SSREG_RW_ADR_52.bits.SSIcfg = 0; // SSI ring congig ??????? - SSREG_RW_ADR_52.bits.Sth = 0x07; - SSREG_RW_ADR_52.bits.UVW = 0; - SSREG_RW_ADR_52.bits.Res = 0; - -} - - diff --git a/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/Speed_Sensor.h b/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/Speed_Sensor.h deleted file mode 100644 index c49bc2c6f..000000000 --- a/Software/Embedded_SW/Embedded/Drivers/Danser_SSI/Speed_Sensor.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * Speed_Sensor.h - * - * Created on: Aug 2, 2018 - * Author: avi - */ - -#ifndef DRIVERS_DANSER_SSI_SPEED_SENSOR_H_ -#define DRIVERS_DANSER_SSI_SPEED_SENSOR_H_ - - - -#define EEPROM_RW_ADR_0 0x00 -#define EEPROM_RW_ADR_1 0x01 -#define EEPROM_RW_ADR_2 0x02 -#define EEPROM_RW_ADR_3 0x03 - -#define REGISTER_R_ADR_32 0x20 -#define REGISTER_R_ADR_33 0x21 -#define REGISTER_R_ADR_34 0x22 -#define REGISTER_R_ADR_35 0x23 - -#define REGISTER_RW_ADR_48 0x30 -#define REGISTER_RW_ADR_49 0x31 -#define REGISTER_RW_ADR_50 0x32 -#define REGISTER_RW_ADR_51 0x33 - - -//REGISTER_R_ADR_32 , REGISTER_RW_ADR_48 -typedef union -{ - struct - { - uint8_t Addr : 7; //0-6 - bool Spare_Bit7 : 1; //7 - bool Reg35 : 1; //8 - bool Pdie : 1; //9 - uint8_t Pdtr : 2; //10-11 - bool Slowint : 1; //12 - bool Spare_Bit13 : 1; //13 - bool AGCdis : 1; //14 - bool Pdint : 1; //15 - - }bits; - unsigned short ushort; -}SSReg0; - -//EEPROM_RW_ADR_1 , REGISTER_RW_ADR_49 -typedef union -{ - struct - { - uint16_t Zin : 12;//0-11 - bool Sign : 1; //12 - bool Monsel : 1; //13 - bool Bufsel : 1; //14 - bool Abridis : 1; //15 - }bits; - unsigned short ushort; -}SSReg1; - -//EEPROM_RW_ADR_2 , REGISTER_RW_ADR_50 -typedef union -{ - struct - { - uint8_t Hist : 7; //0-6 - bool Daa : 1; //7 - uint8_t Nfil : 8; //8-15 - }bits; - unsigned short ushort; -}SSReg2; - -//EEPROM_RW_ADR_3 , REGISTER_RW_ADR_51 -typedef union -{ - struct - { - uint8_t Res : 3; //0-2 - uint8_t UVW : 3; //3-5 - uint8_t Sth : 3; //6-8 - bool Spare_Bits9 : 1; //9 - bool Spare_Bits10 : 1; //10 - uint8_t SSIcfg : 2; //11-12 - uint8_t Dac : 2; //13-14 - bool Dact : 1; //15 - }bits; - unsigned short ushort; -}SSReg3; - - - -#endif /* DRIVERS_DANSER_SSI_SPEED_SENSOR_H_ */ diff --git a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SSI_Comm.c b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SSI_Comm.c index cd6643c72..5d22b2d67 100644 --- a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SSI_Comm.c +++ b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SSI_Comm.c @@ -10,7 +10,7 @@ #include #include #include "drivers/FPGA/FPGA_SSI_Comm.h" -#include "drivers/Danser_SSI/SSI_Comm.h" +#include "drivers/SSI_Comm/SSI_Comm.h" #include "PMR/Hardware/HardwareDancerType.pb-c.h" diff --git a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SSI_Comm.h b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SSI_Comm.h index 168fa43a1..0efb9b8a2 100644 --- a/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SSI_Comm.h +++ b/Software/Embedded_SW/Embedded/Drivers/FPGA/FPGA_SSI_Comm.h @@ -8,7 +8,7 @@ #ifndef DRIVERS_FPGA_FPGA_SSI_COMM_H_ #define DRIVERS_FPGA_FPGA_SSI_COMM_H_ -#include "drivers/Danser_SSI/SSI_Comm.h" +#include "drivers/SSI_Comm/SSI_Comm.h" typedef struct // 24bit { diff --git a/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Dancer/Dancer.c b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Dancer/Dancer.c new file mode 100644 index 000000000..514ba7134 --- /dev/null +++ b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Dancer/Dancer.c @@ -0,0 +1,91 @@ +/* + * Dancer.c + * + * Created on: Aug 5, 2018 + * Author: avi + */ + + +#include +#include +#include +#include +#include + +#include "inc/hw_memmap.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" +#include "driverlib/ssi.h" +#include "driverlib/sysctl.h" +#include "utils/uartstdio.h" + +#include +#include +#include +#include +#include "driverlib/uart.h" + +#include "drivers/FPGA/FPGA_SSI_Comm.h" +#include "PMR/Hardware/HardwareDancerType.pb-c.h" + + + +extern SSI_DANCER_ENC DANCER_ENC[NUM_OF_ROTENC]; + +typedef struct // 24bit +{ + unsigned short Position:14; + unsigned char Gen_status:2; + unsigned char Det_status:8; +}SSI_ENC; + +SSI_ENC SSI_enc; + +uint32_t Control_Read_Dancer_Position(HardwareDancerType DancerId, uint32_t Parameter1, uint32_t Parameter2) +{ + return DANCER_ENC[DancerId].Position; + //return SSI_enc.Position; +} + + +uint32_t Read_Dancer_Position (HardwareDancerType DancerId) +{ + #ifdef EVALUATION_BOARD + uint32_t ENC_SSI_Data = 0; + + SSIEnable(SSI1_BASE); + + ENC_SSI_Data = Write_Dummy_Byte(); + + + //SSI_enc.Det_status = ENC_SSI_Data & 0xFF; + //ENC_SSI_Data = ENC_SSI_Data >> 8; + SSI_enc.Det_status = 0; + + SSI_enc.Gen_status = ENC_SSI_Data & 0x3; + ENC_SSI_Data = ENC_SSI_Data >> 2; + SSI_enc.Position = ENC_SSI_Data & 0x3FFF; // up 11130 down 8747 + + SSIDisable(SSI1_BASE); + return SSI_enc.Position; + #else + // must call FPGA_SSI_Transmit first! + HardwareDancerType Dancer_Id = (HardwareDancerType)DancerId;//to remove warning + FPGA_SSI_Receive(Dancer_Id); + FPGA_SSI_Transmit(Dancer_Id); + return DANCER_ENC[Dancer_Id].Position; + #endif +} + +void Loop_SSI() +{ + while(1) + { + Read_Dancer_Position(HARDWARE_DANCER_TYPE__RightDancer); + SysCtlDelay(1000); // Min 1000 (Pause time > 20uSec) + } + +} + + + diff --git a/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Dancer/Dancer.h b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Dancer/Dancer.h new file mode 100644 index 000000000..8d21de87b --- /dev/null +++ b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Dancer/Dancer.h @@ -0,0 +1,20 @@ +/* + * Dancer.h + * + * Created on: Aug 5, 2018 + * Author: avi + */ + +#ifndef DRIVERS_SSI_COMM_DANCER_DANCER_H_ +#define DRIVERS_SSI_COMM_DANCER_DANCER_H_ + +uint32_t Read_Dancer_Position (HardwareDancerType DancerId); +uint32_t Control_Read_Dancer_Position(HardwareDancerType DancerId, uint32_t Parameter1, uint32_t Parameter2); +uint32_t Read_Speed_Sensor (void); + +void Loop_SSI(); + + + + +#endif /* DRIVERS_SSI_COMM_DANCER_DANCER_H_ */ diff --git a/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/SSI_Comm.c b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/SSI_Comm.c new file mode 100644 index 000000000..7f35ead98 --- /dev/null +++ b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/SSI_Comm.c @@ -0,0 +1,203 @@ +// RLS Orbis BR10SCB14B12CH00 +//RLS Orbis +//BR10 +//SC - SSI +//B - Start bit and idle data line 1 (standard) +//14B - 14 bits per revolution +//12 - Magnet type compatibility +//C - - 0 °C to +85 °C +//H - Soldering pads with through holes +//00 - No special requirements + + +/* +down + +Name : RByte + Default:34988 + Hex:0x000088AC + Decimal:34988 + Octal:0104254 + Binary:0000000000000000 10001000101011 00b (position = 8747) +up + Name : RByte + Default:44520 + Hex:0x0000ADE8 + Decimal:44520 + Octal:0126750 + Binary:0000000000000000 10101101111010 00b (position = 11130) + + missing 8 bits of Detailed status (the 16 MSB should not be receive) + */ + +#include +#include +#include +#include +#include + +#include "inc/hw_memmap.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" +#include "driverlib/ssi.h" +#include "driverlib/sysctl.h" +#include "utils/uartstdio.h" + +#include +#include +#include +#include +#include "driverlib/uart.h" + +#include "drivers/FPGA/FPGA_SSI_Comm.h" +#include "PMR/Hardware/HardwareDancerType.pb-c.h" + + +// +//extern SSI_DANCER_ENC DANCER_ENC[NUM_OF_ROTENC]; +// +//typedef struct // 24bit +//{ +// unsigned short Position:14; +// unsigned char Gen_status:2; +// unsigned char Det_status:8; +//}SSI_ENC; + +/* +typedef enum +{ + FEEDER_DANCER, + POOLER_DANCER, + WINDER_DANCER, + NUM_OF_DANCERS +} Dancers_t; + + {LDANCER1_ROTENC2,"LDANCER1_ROTENC2"}, + {LDANCER2_ROTENC2,"LDANCER2_ROTENC2"}, + {RDANCER_ROTENC2,"RDANCER_ROTENC2"}, +*/ + + +void SSI1_Init() +{ + #if defined(TARGET_IS_TM4C129_RA0) || \ + defined(TARGET_IS_TM4C129_RA1) || \ + defined(TARGET_IS_TM4C129_RA2) + uint32_t ui32SysClock; + #endif + + // + // Set the clocking to run directly from the external crystal/oscillator. + // TODO: The SYSCTL_XTAL_ value must be changed to match the value of the + // crystal on your board. + // + #if defined(TARGET_IS_TM4C129_RA0) || \ + defined(TARGET_IS_TM4C129_RA1) || \ + defined(TARGET_IS_TM4C129_RA2) + + ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | + SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | + SYSCTL_CFG_VCO_480), 120000000); + #else + SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + #endif + + // The SSI1 peripheral must be enabled for use. + // + SysCtlPeripheralReset(SYSCTL_PERIPH_SSI1); + SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1); + + // + // For this example SSI1 is used with PortG[7:4]. GPIO port G needs to be + // enabled so these pins can be used. + // + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); + + /* Configure pad settings */ // AVI +// GPIOPadConfigSet(GPIO_PORTE_BASE, +// GPIO_PIN_4, +// GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD); + + GPIOPadConfigSet(GPIO_PORTE_BASE, + GPIO_PIN_5, + GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU); + + GPIOPadConfigSet(GPIO_PORTB_BASE, + GPIO_PIN_4 | GPIO_PIN_5, + GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD); + + // + // Configure the pin muxing for SSI1 functions + // This step is not necessary if your part does not support pin muxing. + // + + GPIOPinConfigure(GPIO_PB5_SSI1CLK); + GPIOPinConfigure(GPIO_PB4_SSI1FSS); + GPIOPinConfigure(GPIO_PE4_SSI1XDAT0); + GPIOPinConfigure(GPIO_PE5_SSI1XDAT1); + + // + // Configure the GPIO settings for the SSI pins. This function also gives + // control of these pins to the SSI hardware. Consult the data sheet to + // see which functions are allocated per pin. + // The pins are assigned as follows: + // PE4 - SSI1Tx + // PE5 - SSI1Rx + // PB4 - SSI1Fss + // PB5 - SSI1CLK + //SSI0XDAT0......SSI0TX in Legacy SSI Mode....which is MOSI in your terms + //SSI0XDAT1......SSI0RX in Legacy SSI Mode....which is MISO in your terms + // + GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5); + //GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5); + GPIOPinTypeSSI(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5); + + // + // Configure and enable the SSI1 port for SPI Master mode. + // + +// SSIConfigSetExpClk(SSI1_BASE, ui32SysClock, SSI_FRF_NMW, +// SSI_MODE_MASTER, 500000, 16); // to receive Clock period 2uSec, Clock frequency 500KHz +// //SSI_MODE_MASTER send 24 bits 0x00 (dummy) 0x7f 0xff -> create clock of 24 bits for SSI +// + SSIConfigSetExpClk(SSI1_BASE, ui32SysClock, SSI_FRF_MOTO_MODE_0,//SSI_FRF_NMW, + SSI_MODE_MASTER, 500000, 32);//16); // to receive Clock period 2uSec, Clock frequency 500KHz + //SSI_MODE_MASTER send 24 bits 0x00 (dummy) 0x7f 0xff -> create clock of 24 bits for SSI + + SSIAdvModeSet(SSI1_BASE,SSI_ADV_MODE_READ_WRITE ); // ??? Acording to Silicon Errata - SSI1 can Only be Used in Legacy Mode !!! + // + // Disable the SSI1 module. + // + SSIDisable(SSI1_BASE); + //---------------------------------------------------------------- + +} + +uint32_t Write_Dummy_Byte() +{ + //Transmit a dummy set of words to get the SPI to generate a certain number of clocks + uint8_t WByte = 0x00; // Dummy Byte + uint32_t RByte = 0x00; + + uint32_t timeout = SSI_SPI_TIMEOUT; + + SSIDataPut(SSI1_BASE, WByte); + + while(SSIBusy(SSI1_BASE)) + { + timeout--; + if(timeout == 0) + { + return 0; + } + } + + while(SSIDataGetNonBlocking(SSI1_BASE, &RByte)){}; //FIFO to read 24 bit + + + //return (RByte & 0xffffff);// 24 bytes + return (RByte & 0xffff);//14 bit position + 2 bit general status +} diff --git a/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/SSI_Comm.h b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/SSI_Comm.h new file mode 100644 index 000000000..9028de45b --- /dev/null +++ b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/SSI_Comm.h @@ -0,0 +1,30 @@ +/* + * MillisecTask.h + * + * Created on: 15 Mar 2018 + * Author: Avi + */ + +#ifndef DRIVERS_DANCER_SSI_SSI_COMM_H_ +#define DRIVERS_DANCER_SSI_SSI_COMM_H_ + +#include "PMR/Hardware/HardwareDancerType.pb-c.h" + +/*typedef enum +{ + //DANSER_ROTENC: + ROTENC_LDANCER2, // winder Dancer adjustment #1 LEFT Dancer + ROTENC_LDANCER1, // pooler Dancer adjustment Middle Dancer + ROTENC_RDANCER, // feeder dancer adjustment Right Dancer +// ROTENC_LSPARE, +// ROTENC_RSPARE, + //DISPENSER_ROTENC: + + NUM_OF_ROTENC +}RotEnc_t;*/ + +#define NUM_OF_ROTENC HARDWARE_DANCER_TYPE__RightDancer+1 +void SSI1_Init(); + + +#endif //DRIVERS_DANCER_SSI_SSI_COMM_H_ diff --git a/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.c b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.c new file mode 100644 index 000000000..fc831da41 --- /dev/null +++ b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.c @@ -0,0 +1,118 @@ +/* + * Speed_Sensor.c + * + * Created on: Aug 2, 2018 + * Author: avi + * + * The speed sensor, RMB14SC12BC59N , is 12bit SSI encoder. + * According to the data sheet, It has an internal IC : AM4096. + * + */ +#include +#include +#include +#include +#include + +#include "inc/hw_memmap.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" +#include "driverlib/ssi.h" +#include "driverlib/sysctl.h" +#include "utils/uartstdio.h" + +#include +#include +#include +#include +#include +#include "driverlib/uart.h" + +#include "drivers/FPGA/FPGA_SSI_Comm.h" + +/* +SSReg0 SSREG_RW_ADR_49; +SSReg1 SSREG_RW_ADR_50; +SSReg2 SSREG_RW_ADR_51; +SSReg3 SSREG_RW_ADR_52; + + +void Init_Speed_Sensor_Registers() +{ + SSREG_RW_ADR_49.bits.Pdint = 0; //0 = on, 1 = off + SSREG_RW_ADR_49.bits.AGCdis = 1; //0 = AGC on, 1 = AGC off + SSREG_RW_ADR_49.bits.Slowint = 1; //0 = on, 1 = off - It must always be set to 1 + SSREG_RW_ADR_49.bits.Pdtr = 0; //00 = 1:128, 01 = 1:256, 10 = 1:512, 11 = 1:1024 + SSREG_RW_ADR_49.bits.Pdie = 0; //0 = disabled, 1 = enabled + SSREG_RW_ADR_49.bits.Reg35 = 0; //0 = 3 V, 1 = 3.3 V ??? 5v + SSREG_RW_ADR_49.bits.Addr = 0; //0 to 127 Default address is set to 0. + + SSREG_RW_ADR_50.bits.Abridis = 1; + SSREG_RW_ADR_50.bits.Bufsel = 0; + SSREG_RW_ADR_50.bits.Monsel = 0; //must be set to 0 + SSREG_RW_ADR_50.bits.Sign = 0; + SSREG_RW_ADR_50.bits.Zin = 0; + + SSREG_RW_ADR_51.bits.Daa = 0; + SSREG_RW_ADR_51.bits.Hist = 0; + SSREG_RW_ADR_51.bits.Nfil = 0; //must be set to 0 + + SSREG_RW_ADR_52.bits.Dact = 1; + SSREG_RW_ADR_52.bits.Dac = 0; + SSREG_RW_ADR_52.bits.SSIcfg = 0; // SSI ring config ??????? + SSREG_RW_ADR_52.bits.Sth = 0x07; + SSREG_RW_ADR_52.bits.UVW = 0; + SSREG_RW_ADR_52.bits.Res = 0; + +} + +*/ + +uint32_t Read_Speed_Sensor () // //The speed sensor, RMB14SC12BC59N , is 12bit SSI encoder +{ + FPGA_SSI_Speed_Sensor_Transnit(); + FPGA_SSI_Speed_Sensor_Receive(); + return SpeedSensorResponseS.Speed; +} + +uint32_t Calculate_Speed_Sensor_Velocity( void ) // Call the function every 100mSec +{ + + /* + * Velocity = 2*Phi*n/Nt + Where: + Velocity = angular speed (rad/s) + n = number of pulses + t = sampling period (s) + N = pulses per rotation + */ + + static uint32_t Prev_Enc_Position = 0; + uint32_t Enc_Position = Read_Speed_Sensor(); + + uint32_t number_of_pulses = Enc_Position - Prev_Enc_Position; + + uint32_t sampling_period_mSec = 100; + + uint32_t pulses_per_rotation = 0x0FFF;// ??? + + float temp = 2 * 3.14159265; // 2 *Phi + + temp *=number_of_pulses;//2 *Phi*n + + temp *=1000; //msec to sec; + + temp /= pulses_per_rotation; + + temp /= sampling_period_mSec; + + uint32_t velocity = (uint32_t) temp; // Rad/Sec + + Prev_Enc_Position = Enc_Position; + + //1 Rad/Sec = 9.5493 RPM + + return velocity; +} + + diff --git a/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.h b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.h new file mode 100644 index 000000000..d3eae1129 --- /dev/null +++ b/Software/Embedded_SW/Embedded/Drivers/SSI_Comm/Speed_Sensor/Speed_Sensor.h @@ -0,0 +1,95 @@ +/* + * Speed_Sensor.h + * + * Created on: Aug 2, 2018 + * Author: avi + */ + +#ifndef DRIVERS_SSI_COMM_SPEED_SENSOR_H_ +#define DRIVERS_SSI_COMM_SPEED_SENSOR_H_ + +/* + +#define EEPROM_RW_ADR_0 0x00 +#define EEPROM_RW_ADR_1 0x01 +#define EEPROM_RW_ADR_2 0x02 +#define EEPROM_RW_ADR_3 0x03 + +#define REGISTER_R_ADR_32 0x20 +#define REGISTER_R_ADR_33 0x21 +#define REGISTER_R_ADR_34 0x22 +#define REGISTER_R_ADR_35 0x23 + +#define REGISTER_RW_ADR_48 0x30 +#define REGISTER_RW_ADR_49 0x31 +#define REGISTER_RW_ADR_50 0x32 +#define REGISTER_RW_ADR_51 0x33 + + +//REGISTER_R_ADR_32 , REGISTER_RW_ADR_48 +typedef union +{ + struct + { + uint8_t Addr : 7; //0-6 + bool Spare_Bit7 : 1; //7 + bool Reg35 : 1; //8 + bool Pdie : 1; //9 + uint8_t Pdtr : 2; //10-11 + bool Slowint : 1; //12 + bool Spare_Bit13 : 1; //13 + bool AGCdis : 1; //14 + bool Pdint : 1; //15 + + }bits; + unsigned short ushort; +}SSReg0; + +//EEPROM_RW_ADR_1 , REGISTER_RW_ADR_49 +typedef union +{ + struct + { + uint16_t Zin : 12;//0-11 + bool Sign : 1; //12 + bool Monsel : 1; //13 + bool Bufsel : 1; //14 + bool Abridis : 1; //15 + }bits; + unsigned short ushort; +}SSReg1; + +//EEPROM_RW_ADR_2 , REGISTER_RW_ADR_50 +typedef union +{ + struct + { + uint8_t Hist : 7; //0-6 + bool Daa : 1; //7 + uint8_t Nfil : 8; //8-15 + }bits; + unsigned short ushort; +}SSReg2; + +//EEPROM_RW_ADR_3 , REGISTER_RW_ADR_51 +typedef union +{ + struct + { + uint8_t Res : 3; //0-2 + uint8_t UVW : 3; //3-5 + uint8_t Sth : 3; //6-8 + bool Spare_Bits9 : 1; //9 + bool Spare_Bits10 : 1; //10 + uint8_t SSIcfg : 2; //11-12 + uint8_t Dac : 2; //13-14 + bool Dact : 1; //15 + }bits; + unsigned short ushort; +}SSReg3; + +*/ + +uint32_t Calculate_Speed_Sensor_Velocity( void ); + +#endif /* DRIVERS_SSI_COMM_SPEED_SENSOR_H_ */ diff --git a/Software/Embedded_SW/Embedded/Main.c b/Software/Embedded_SW/Embedded/Main.c index 05c03254a..662426d41 100644 --- a/Software/Embedded_SW/Embedded/Main.c +++ b/Software/Embedded_SW/Embedded/Main.c @@ -44,7 +44,7 @@ extern Semaphore_Handle sdCardSem; -#include "drivers/Danser_SSI/SSI_Comm.h" +#include #include "drivers/SPI/SPI_Comm.h" #include "drivers/Uart_Comm/Uart.h" diff --git a/Software/Embedded_SW/Embedded/Modules/AlarmHandling/AlarmHandling.c b/Software/Embedded_SW/Embedded/Modules/AlarmHandling/AlarmHandling.c index 9337676e4..0ea10bafc 100644 --- a/Software/Embedded_SW/Embedded/Modules/AlarmHandling/AlarmHandling.c +++ b/Software/Embedded_SW/Embedded/Modules/AlarmHandling/AlarmHandling.c @@ -11,13 +11,13 @@ #include "AlarmHandling.h" #include +#include #include #include "drivers/adc_sampling/adc.h" #include "Control/control.h" #include "drivers/Motors/Motor.h" -#include "drivers/Danser_SSI/SSI_Comm.h" #include "drivers/Heater/TemperatureSensor.h" #include "drivers/FPGA/FPGA_SPI_Comm.h" #include "drivers/FPGA/FPGA_GPIO/FPGA_GPIO.h" diff --git a/Software/Embedded_SW/Embedded/Modules/Control/MillisecTask.c b/Software/Embedded_SW/Embedded/Modules/Control/MillisecTask.c index 8243c5faa..64ac4789d 100644 --- a/Software/Embedded_SW/Embedded/Modules/Control/MillisecTask.c +++ b/Software/Embedded_SW/Embedded/Modules/Control/MillisecTask.c @@ -20,13 +20,13 @@ #include "MillisecTask.h" #include +#include #include #include "drivers/adc_sampling/adc.h" #include "control.h" #include "drivers/Motors/Motor.h" -#include "drivers/Danser_SSI/SSI_Comm.h" #include "drivers/Heater/TemperatureSensor.h" #include "drivers/FPGA/FPGA_SPI_Comm.h" #include "drivers/FPGA/FPGA.h" diff --git a/Software/Embedded_SW/Embedded/Modules/Diagnostics/Diagnostics.c b/Software/Embedded_SW/Embedded/Modules/Diagnostics/Diagnostics.c index ead95388a..a163bd18f 100644 --- a/Software/Embedded_SW/Embedded/Modules/Diagnostics/Diagnostics.c +++ b/Software/Embedded_SW/Embedded/Modules/Diagnostics/Diagnostics.c @@ -13,9 +13,9 @@ #include "Control/control.h" #include +#include #include "drivers/Motors/Motor.h" -#include "drivers/Danser_SSI/SSI_Comm.h" #include "drivers/Heater/TemperatureSensor.h" #include "drivers/FPGA/FPGA_SPI_Comm.h" #include "drivers/FPGA/FPGA_GPIO/FPGA_GPIO.h" diff --git a/Software/Embedded_SW/Embedded/Modules/Thread/Thread.h b/Software/Embedded_SW/Embedded/Modules/Thread/Thread.h index 3a0b25ba8..d37015b61 100644 --- a/Software/Embedded_SW/Embedded/Modules/Thread/Thread.h +++ b/Software/Embedded_SW/Embedded/Modules/Thread/Thread.h @@ -2,6 +2,7 @@ #ifndef MODULES_THREAD_THREAD_H_ #define MODULES_THREAD_THREAD_H_ +#include "../../Drivers/SSI_Comm/SSI_Comm.h" #include "PMR/common/MessageContainer.pb-c.h" #include "PMR/Hardware/HardwareMotor.pb-c.h" #include "PMR/Hardware/HardwareMotorType.pb-c.h" @@ -13,8 +14,6 @@ #include "PMR/Printing/JobSpoolType.pb-c.h" #include "drivers/Motors/Motor.h" -#include "drivers/Danser_SSI/ssi_comm.h" - #include "thread_ex.h" typedef struct diff --git a/Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c b/Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c index 75d54ef02..af9be2cc7 100644 --- a/Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c +++ b/Software/Embedded_SW/Embedded/Modules/Thread/Thread_print.c @@ -20,7 +20,8 @@ #include "StateMachines/Printing/PrintingSTM.h" #include "drivers/Motors/Motor.h" -#include "drivers/Danser_SSI/ssi_comm.h" +//#include "drivers/SSI_Comm/ssi_comm.h" +#include "drivers/SSI_Comm/Dancer/Dancer.h" #include "drivers/Heater/TemperatureSensor.h" #include "drivers/Heater/Heater.h" #include "drivers/Motors/Motor.h" -- cgit v1.3.1