// RLS Orbis BR10SCB14B12CH00
//RLS Orbis
//BR10
//SC - SSI
//B - Start bit and idle data line 1 (standard)
//14B - 14 bits per revolution
//12 - Magnet type compatibility
//C - - 0 °C to +85 °C
//H - Soldering pads with through holes
//00 - No special requirements


/*
down

Name : RByte
    Default:34988
    Hex:0x000088AC
    Decimal:34988
    Octal:0104254
    Binary:0000000000000000 10001000101011 00b  (position = 8747)
up
    Name : RByte
    Default:44520
    Hex:0x0000ADE8
    Decimal:44520
    Octal:0126750
    Binary:0000000000000000 10101101111010  00b (position = 11130)

    missing 8 bits of Detailed status (the 16 MSB should not be receive)
 */

#include <stdbool.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>

#include "inc/hw_memmap.h"
#include "driverlib/gpio.h"
#include "driverlib/pin_map.h"
#include "driverlib/ssi.h"
#include "driverlib/sysctl.h"
#include "utils/uartstdio.h"

#include <driverlib/rom.h>
#include <driverlib/rom_map.h>
#include <DataDef.h>
#include <Drivers/SSI_Comm/SSI_Comm.h>
#include "driverlib/uart.h"

#include "drivers/FPGA/FPGA_SSI_Comm.h"
#include "PMR/Hardware/HardwareDancerType.pb-c.h"


//
//extern SSI_DANCER_ENC DANCER_ENC[NUM_OF_ROTENC];
//
//typedef struct  // 24bit
//{
//    unsigned short Position:14;
//    unsigned char Gen_status:2;
//    unsigned char Det_status:8;
//}SSI_ENC;

/*
typedef enum
{
    FEEDER_DANCER,
    POOLER_DANCER,
    WINDER_DANCER,
    NUM_OF_DANCERS
} Dancers_t;

       {LDANCER1_ROTENC2,"LDANCER1_ROTENC2"},
       {LDANCER2_ROTENC2,"LDANCER2_ROTENC2"},
       {RDANCER_ROTENC2,"RDANCER_ROTENC2"},
*/


void SSI1_Init()
{
    #if defined(TARGET_IS_TM4C129_RA0) ||                                         \
    defined(TARGET_IS_TM4C129_RA1) ||                                         \
    defined(TARGET_IS_TM4C129_RA2)
        uint32_t ui32SysClock;
    #endif

    //
    // Set the clocking to run directly from the external crystal/oscillator.
    // TODO: The SYSCTL_XTAL_ value must be changed to match the value of the
    // crystal on your board.
    //
    #if defined(TARGET_IS_TM4C129_RA0) ||                                         \
    defined(TARGET_IS_TM4C129_RA1) ||                                         \
    defined(TARGET_IS_TM4C129_RA2)

    ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
                                             SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
                                             SYSCTL_CFG_VCO_480), 120000000);
    #else
        SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
                   SYSCTL_XTAL_16MHZ);
    #endif

    // The SSI1 peripheral must be enabled for use.
    //
    SysCtlPeripheralReset(SYSCTL_PERIPH_SSI1);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1);

    //
    // For this example SSI1 is used with PortG[7:4].  GPIO port G needs to be
    // enabled so these pins can be used.
    //
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);

    /* Configure pad settings */  // AVI
//    GPIOPadConfigSet(GPIO_PORTE_BASE,
//            GPIO_PIN_4,
//            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);

    GPIOPadConfigSet(GPIO_PORTE_BASE,
            GPIO_PIN_5,
            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU);

    GPIOPadConfigSet(GPIO_PORTB_BASE,
            GPIO_PIN_4 | GPIO_PIN_5,
            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);

    //
    // Configure the pin muxing for SSI1 functions
    // This step is not necessary if your part does not support pin muxing.
    //

    GPIOPinConfigure(GPIO_PB5_SSI1CLK);
    GPIOPinConfigure(GPIO_PB4_SSI1FSS);
    GPIOPinConfigure(GPIO_PE4_SSI1XDAT0);
    GPIOPinConfigure(GPIO_PE5_SSI1XDAT1);

    //
    // Configure the GPIO settings for the SSI pins.  This function also gives
    // control of these pins to the SSI hardware.  Consult the data sheet to
    // see which functions are allocated per pin.
    // The pins are assigned as follows:
    //      PE4 - SSI1Tx
    //      PE5 - SSI1Rx
    //      PB4 - SSI1Fss
    //      PB5 - SSI1CLK
    //SSI0XDAT0......SSI0TX in Legacy SSI Mode....which is MOSI in your terms
    //SSI0XDAT1......SSI0RX in Legacy SSI Mode....which is MISO in your terms
    //
    GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
    //GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5);
    GPIOPinTypeSSI(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);

    //
    // Configure and enable the SSI1 port for SPI Master mode.
    //

//    SSIConfigSetExpClk(SSI1_BASE, ui32SysClock, SSI_FRF_NMW,
//                           SSI_MODE_MASTER, 500000, 16); // to receive Clock period 2uSec, Clock frequency 500KHz
//                                                         //SSI_MODE_MASTER send 24 bits 0x00 (dummy) 0x7f 0xff -> create clock of 24 bits for SSI
//
    SSIConfigSetExpClk(SSI1_BASE, ui32SysClock, SSI_FRF_MOTO_MODE_0,//SSI_FRF_NMW,
                       SSI_MODE_MASTER, 500000, 32);//16); // to receive Clock period 2uSec, Clock frequency 500KHz
                                                     //SSI_MODE_MASTER send 24 bits 0x00 (dummy) 0x7f 0xff -> create clock of 24 bits for SSI

    SSIAdvModeSet(SSI1_BASE,SSI_ADV_MODE_READ_WRITE );  // ??? Acording to Silicon Errata - SSI1 can Only be Used in Legacy Mode !!!
    //
    // Disable the SSI1 module.
    //
    SSIDisable(SSI1_BASE);
    //----------------------------------------------------------------

}

uint32_t Write_Dummy_Byte()
{
    //Transmit a dummy set of words to get the SPI to generate a certain number of clocks
    uint8_t WByte = 0x00; // Dummy Byte
    uint32_t RByte = 0x00;

    uint32_t timeout = SSI_SPI_TIMEOUT;

    SSIDataPut(SSI1_BASE, WByte);

    while(SSIBusy(SSI1_BASE))
    {
        timeout--;
        if(timeout == 0)
        {
            return 0;
        }
    }

    while(SSIDataGetNonBlocking(SSI1_BASE, &RByte)){}; //FIFO to read 24 bit


    //return (RByte & 0xffffff);// 24 bytes
    return (RByte & 0xffff);//14 bit position + 2 bit general status
}