aboutsummaryrefslogtreecommitdiffstats
path: root/Software/Embedded_SW/Embedded/Drivers/I2C_Communication/I2C.c
blob: 22a01f6aa1eae7386fa9a5fbd8ad09cf19887534 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
#include "Drivers/I2C_Communication/I2C.h"
#include <driverlib/sysctl.h>
#include <driverlib/rom_map.h>
#include <inc/hw_memmap.h>
#include <driverlib/i2c.h>
#include "include.h"
//#include "Common/Sys_Configuration/Configuration.h"

#define CONFIG_REGISTER_ADDRESS	0x01
#define LSB_BITMAP_CONFIGURATION_OF_CONFIG_REG	0x83

#define MSB_BITMAP_CONFIG_REG_SAMPELING_CHANEL_A0	0xc4
#define MSB_BITMAP_CONFIG_REG_SAMPELING_CHANEL_A1	0xd4
#define MSB_BITMAP_CONFIG_REG_SAMPELING_CHANEL_A2	0xe4
#define MSB_BITMAP_CONFIG_REG_SAMPELING_CHANEL_A3	0xf4

#define START_DATA_DELAY	1500
#define READ_DATA_DELAY		1000
#define END_DATA_DELAY		100000

#define SLAVE_ADDRESS_1 	0x48
#define SLAVE_ADDRESS_2 	0x4a
#define SLAVE_NUM_OF_CHAN	4
#define I2C_FIRST_CHANNEL_ADDR 0xc3
#define START_WRITING_TO_CONFIG_REG_IN_SLAVE 	0x01
#define START_READ_FROM_CONVERSION_REG_IN_SLAVE 0x00 //read sampled results

void InitI2C(void)
{
	//
	MAP_SysCtlPeripheralReset(SYSCTL_PERIPH_I2C0);
	//
	// Stop the Clock, Reset and Enable I2C Module
	// in Master Function
	//
	MAP_SysCtlPeripheralDisable(SYSCTL_PERIPH_I2C0);
	MAP_SysCtlPeripheralReset(SYSCTL_PERIPH_I2C0);
	MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);

	//
	// Wait for the Peripheral to be ready for programming
	//
	while(!MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_I2C0));
	//
	// Initialize the I2C master module.
	//
	I2CMasterInitExpClk (I2C0_BASE, SYS_CLK_FREQ, true);
}

//each entry into the function reads result from one sampled channel in the USB
void SampleI2CData(uint32_t* resultData)
{
	uint8_t _resultData[2];
	static uint8_t _currSlaveAddress = SLAVE_ADDRESS_1;
	static uint8_t _currChannel = 0;
	uint8_t dataIndex = 0;

	// modulo calculation used to take specific channel from ADC each time - channel 0,1,2,3
	_currChannel = (_currChannel+1) & 0x3;

	//if finished reading first ADC channels , reset the channel index to next ADC
	if ((_currSlaveAddress == SLAVE_ADDRESS_2) && (_currChannel == 3))
	{
		_currChannel = 0;
	}

	// reset slave addres to next ADC card
	if (_currChannel == 0)
	{
		_currSlaveAddress = (_currSlaveAddress == SLAVE_ADDRESS_1) ? SLAVE_ADDRESS_2 : SLAVE_ADDRESS_1;
	}

	//calculate index of where to write result data in the resultData array
	dataIndex = (_currSlaveAddress == SLAVE_ADDRESS_2) ? SLAVE_NUM_OF_CHAN + _currChannel : _currChannel;
	// Send slave address and config reg address
	I2CMasterSlaveAddrSet (I2C0_BASE, _currSlaveAddress, false);
	I2CMasterDataPut(I2C0_BASE, START_WRITING_TO_CONFIG_REG_IN_SLAVE);
	I2CMasterControl(I2C0_BASE,I2C_MASTER_CMD_BURST_SEND_START);
	SysCtlDelay(1500);
//	while (!(I2CMasterBusy(I2C0_BASE))); //Wait till end of transaction
//	while (I2CMasterBusy(I2C0_BASE)); //Wait till end of transaction

	//Send MSB of config reg to current slave
	uint32_t chanAddr = I2C_FIRST_CHANNEL_ADDR + 0x10*_currChannel;
	I2CMasterDataPut(I2C0_BASE, chanAddr);
	I2CMasterControl(I2C0_BASE,I2C_MASTER_CMD_BURST_SEND_CONT);
	SysCtlDelay(15000);
//	while (!(I2CMasterBusy(I2C0_BASE))); //Wait till end of transaction
//	while (I2CMasterBusy(I2C0_BASE)); //Wait till end of transaction

	//Send LSB of config reg to current slave
	I2CMasterDataPut(I2C0_BASE, 0xe3);
	I2CMasterControl(I2C0_BASE,I2C_MASTER_CMD_BURST_SEND_FINISH);
	SysCtlDelay(15000);
//	while (!(I2CMasterBusy(I2C0_BASE))); //Wait till end of transaction
//	while (I2CMasterBusy(I2C0_BASE)); //Wait till end of transaction

	// Send slave address and conversion reg address (reg for reading results)
	I2CMasterSlaveAddrSet (I2C0_BASE, _currSlaveAddress, false);
	I2CMasterDataPut(I2C0_BASE, START_READ_FROM_CONVERSION_REG_IN_SLAVE);
	I2CMasterControl(I2C0_BASE,I2C_MASTER_CMD_SINGLE_SEND);
	SysCtlDelay(15000);
	//	while (!(I2CMasterBusy(I2C0_BASE))); //Wait till end of transaction
	//while (I2CMasterBusy(I2C0_BASE)); //Wait till end of transaction

	// Start Read from configured slave
	I2CMasterSlaveAddrSet(I2C0_BASE, _currSlaveAddress, true);
	I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
	SysCtlDelay(15000);
//	while (!(I2CMasterBusy(I2C0_BASE))); //Wait till end of transaction
//	while (I2CMasterBusy(I2C0_BASE)); //Wait till end of transaction
	//each read result is represented in 16 bit this why we read twise
	//each time in 8 bits
	//read MSB byte
	_resultData[0] = I2CMasterDataGet(I2C0_BASE);

	I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
	SysCtlDelay(15000);
//	while (!(I2CMasterBusy(I2C0_BASE))); //Wait till end of transaction
//	while (I2CMasterBusy(I2C0_BASE)); //Wait till end of transaction
	//read LSB byte
	_resultData[1] = I2CMasterDataGet(I2C0_BASE);

	//concutenate 2 reads of 8 bytes into one read of 16 bytes
	resultData[dataIndex] = _resultData[0] << 8 | _resultData[1];
}