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#include <stdbool.h>
#include <stdlib.h>
#include <stdint.h>
#include "FPGA_COMM.h"
#include "Stubs_Handler/DataDef.h"
#include "driverlib/sysctl.h" //for SysCtlDelay
unsigned short GPO_01_Reg;
int test_FPGA()
{
GP_Out_01 Gpo_01;
Gpo_01.bits.F3_GPO_LED4 = 1;
Gpo_01.bits.F3_GPO_LED3 = 1;
Gpo_01.bits.F3_GPO_LED2 = 0;
Gpo_01.bits.F3_GPO_LED1 = 1;
Gpo_01.bits.F3_GPO_EXTWINDER_SSR11_CTRL = 1;
Gpo_01.bits.F3_GPO_BUZZER = 0;
Gpo_01.bits.F3_SPARE2_ROTENC_CLK = 1;
Gpo_01.bits.F3_SPARE1_ROTENC_CLK = 1;
Gpo_01.bits.RESERVE = 0xF5;
GPO_01_Reg = Gpo_01.ushort;
return 0;
}
int Test_FPGA_ReadBack(unsigned char FPGA_NUM, unsigned short Value, unsigned short *ReadBackValue)// = 0x1234)
{
//TODO to update the deley
if(FPGA_NUM == 1)
{
F1_Test = Value;
SysCtlDelay(100);
*ReadBackValue = F1_Test;
if(Value == !F1_Test)
return PASSED;
}
if(FPGA_NUM == 2)
{
F2_Test = Value;
SysCtlDelay(100);
*ReadBackValue = F2_Test;
if(Value == !F2_Test)
return PASSED;
}
if(FPGA_NUM == 3)
{
F3_Test = Value;
SysCtlDelay(100);
*ReadBackValue = F3_Test;
if(Value == !F3_Test)
return PASSED;
}
return FAILED;
}
int FPGA_ReadVersion(unsigned char FPGA_NUM, unsigned char *Version, unsigned char *Year, unsigned char *Month, unsigned char *Day)
{
VER1 Ver1;
VER2 Ver2;
switch(FPGA_NUM)
{
case 1:
Ver1.ushort = F1_Ver1_D;
Ver2.ushort = F1_Ver2_D;
break;
case 2:
Ver1.ushort = F2_Ver1_D;
Ver2.ushort = F2_Ver2_D;
break;
case 3:
Ver1.ushort = F3_Ver1_D;
Ver2.ushort = F3_Ver2_D;
break;
default:
break;
}
if( (Ver1.bytes.Month > 12) || (Ver1.bytes.Day > 31) || (Ver2.bytes.Year < 17) )
{
return FAILED;
}
*Month = Ver1.bytes.Month;
*Day = Ver1.bytes.Day;
*Year = Ver2.bytes.Year; // to check how many digits is needed
*Version = Ver2.bytes.Ver_num;
return PASSED;
}
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