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using System;
using System.Text;
using System.Linq;
using System.Drawing;
using System.Diagnostics;
using System.Windows.Forms;
using System.Threading;
using System.Threading.Tasks;
using System.Collections.Generic;
using Tango.PMR.Stubs;
using Tango.Stubs;
include "..\..\Defines\Tango_Defines_Basic.cs"
include "Tango_Defines_PT100.cs"
//include "C:\To_Backup\Mulberry\Mulberry_current\Customers\Twine\Tango\LAB_Tests\Main_PCB\ATP_Test\Scripts\Defines\Tango_Defines_Basic.cs"
//include "C:\To_Backup\Mulberry\Mulberry_current\Customers\Twine\Tango\LAB_Tests\Main_PCB\ATP_Test\Scripts\Defines\Tango_Defines_PT100.cs"
Int32 ADS1220_Setup(Int32 Fpga, Int32 HighAdr, Int32 LowAdr, Int32 BusyBitNo)
{
ADS1220_Reset(Fpga, HighAdr, LowAdr);
ADS1220_WriteReg(Fpga, HighAdr, LowAdr, 0x0, 0x08);
//ADS1220_WriteReg(Fpga, HighAdr, LowAdr, 0x1, 0x04); //Continuous mode
ADS1220_WriteReg(Fpga, HighAdr, LowAdr, 0x1, 0x00); //Single shot mode
ADS1220_WriteReg(Fpga, HighAdr, LowAdr, 0x2, 0x55);
ADS1220_WriteReg(Fpga, HighAdr, LowAdr, 0x3, 0x70);
//ADS1220_StartSync(Fpga, HighAdr, LowAdr);
return 1;
}
Int32 ADS1220_ConvertionProcess(Int32 Fpga, Int32 HighAdr, Int32 LowAdr, Int32 BusyBitNo)
{
Int32 rv;
ADS1220_StartSync(Fpga, HighAdr, LowAdr);
Thread.Sleep(100);
//rv = ADS1220_GetConvertion(Fpga, HighAdr, LowAdr, BusyBitNo);
rv = ADS1220_LoadOutReg(Fpga, HighAdr, LowAdr, BusyBitNo);
stubManager.WriteHex( rv ,8); stubManager.Write("\t");
return rv;
}
public void OnExecute(StubManager stubManager)
{
int rv = 0;
int k = 0;
ADS1220_Setup(FPGA2, F2_ANALOG_DRYER_TEMP1_1_TX_01, F2_ANALOG_DRYER_TEMP1_1_TX_00, 0);
ADS1220_Setup(FPGA2, F2_ANALOG_DRYER_TEMP2_1_TX_01, F2_ANALOG_DRYER_TEMP2_1_TX_00, 1);
ADS1220_Setup(FPGA2, F2_ANALOG_DRYER_TEMP3_1_TX_01, F2_ANALOG_DRYER_TEMP3_1_TX_00, 2);
ADS1220_Setup(FPGA2, F2_ANALOG_DYEINGH_TEMP1_1_TX_01, F2_ANALOG_DYEINGH_TEMP1_1_TX_00, 3);
ADS1220_Setup(FPGA2, F2_ANALOG_DYEINGH_TEMP2_1_TX_01, F2_ANALOG_DYEINGH_TEMP2_1_TX_00, 4);
ADS1220_Setup(FPGA2, F2_ANALOG_DYEINGH_TEMP3_1_TX_01, F2_ANALOG_DYEINGH_TEMP3_1_TX_00, 5);
ADS1220_Setup(FPGA2, F2_ANALOG_DYEINGH_TEMP4_1_TX_01, F2_ANALOG_DYEINGH_TEMP4_1_TX_00, 6);
ADS1220_Setup(FPGA2, F2_ANALOG_DYEINGH_TEMP5_1_TX_01, F2_ANALOG_DYEINGH_TEMP5_1_TX_00, 7);
ADS1220_Setup(FPGA2, F2_ANALOG_MIXCHIP_TEMP_1_TX_01, F2_ANALOG_MIXCHIP_TEMP_1_TX_00, 8);
ADS1220_Setup(FPGA2, F2_AN_ENCLOSURETEMP1_1_TX_01, F2_AN_ENCLOSURETEMP1_1_TX_00, 9);
ADS1220_Setup(FPGA2, F2_AN_ENCLOSURETEMP2_1_TX_01, F2_AN_ENCLOSURETEMP2_1_TX_00, 10);
ADS1220_Setup(FPGA2, F2_AN_ENCLOSURETEMP3_1_TX_01, F2_AN_ENCLOSURETEMP3_1_TX_00, 11);
stubManager.Write("DRYER_TEMP1\tDRYER_TEMP2\tDRYER_TEMP3\tDYH_TEMP1\tDYH_TEMP2\tDYH_TEMP3\tDYH_TEMP4\tDYH_TEMP5\tMIX_TEMP\tENCTEMP1\tENCTEMP2\tENCTEMP3\n");
for (int i=0; i < 1000; i++)
{
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_DRYER_TEMP1_1_TX_01, F2_ANALOG_DRYER_TEMP1_1_TX_00, 0);
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_DRYER_TEMP2_1_TX_01, F2_ANALOG_DRYER_TEMP2_1_TX_00, 1);
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_DRYER_TEMP3_1_TX_01, F2_ANALOG_DRYER_TEMP3_1_TX_00, 2);
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_DYEINGH_TEMP1_1_TX_01, F2_ANALOG_DYEINGH_TEMP1_1_TX_00, 3);
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_DYEINGH_TEMP2_1_TX_01, F2_ANALOG_DYEINGH_TEMP2_1_TX_00, 4);
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_DYEINGH_TEMP3_1_TX_01, F2_ANALOG_DYEINGH_TEMP3_1_TX_00, 5);
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_DYEINGH_TEMP4_1_TX_01, F2_ANALOG_DYEINGH_TEMP4_1_TX_00, 6);
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_DYEINGH_TEMP5_1_TX_01, F2_ANALOG_DYEINGH_TEMP5_1_TX_00, 7);
rv = ADS1220_ConvertionProcess(FPGA2, F2_ANALOG_MIXCHIP_TEMP_1_TX_01, F2_ANALOG_MIXCHIP_TEMP_1_TX_00, 8);
rv = ADS1220_ConvertionProcess(FPGA2, F2_AN_ENCLOSURETEMP1_1_TX_01, F2_AN_ENCLOSURETEMP1_1_TX_00, 9);
rv = ADS1220_ConvertionProcess(FPGA2, F2_AN_ENCLOSURETEMP2_1_TX_01, F2_AN_ENCLOSURETEMP2_1_TX_00, 10);
rv = ADS1220_ConvertionProcess(FPGA2, F2_AN_ENCLOSURETEMP3_1_TX_01, F2_AN_ENCLOSURETEMP3_1_TX_00, 11);
stubManager.Write("\n");
k++;
if ( (k & 0x10) == 0x10 )
{
k = 0;
stubManager.Write("\nDRYER_TEMP1\tDRYER_TEMP2\tDRYER_TEMP3\tDYH_TEMP1\tDYH_TEMP2\tDYH_TEMP3\tDYH_TEMP4\tDYH_TEMP5\tMIX_TEMP\tENCTEMP1\tENCTEMP2\tENCTEMP3\n");
}
}
}
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